Verilog Design Flow
@clawhub_billchen1020/verilog-design
By billchen1020
About this Skill
Design, implement, and verify Verilog/SystemVerilog modules with spec-driven development, self-checking testbenches, and automated simulation workflows. Supp...
代码生成测试生成脚本工具
Skill files and instructions
Read SKILL.md and the other instructions or configuration files published with this Skill.
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Details
- Category
- Development
- Source
- clawhub
- Version
- 1.2.0
- Updated
- Sep 23, 2026